PAPI_presets - PAPI predefined named events


See Also


#include <papi.h>


The PAPI library names a number of predefined events. This set is a collection of events typically found in many CPUs that provide performance counters. A PAPI preset event name is mapped onto one or more of the countable native events on each hardware platform. On any particular platform, the preset can either be directly available as a single counter, derived using a combination of counters or unavailable.

The PAPI preset events can be broken loosely into several categories, as shown in the table below:

Conditional Branching:

Conditional Branching
PAPI_BR_CNConditional branch instructions
PAPI_BR_INSBranch instructions
PAPI_BR_MSPConditional branch instructions mispredicted
PAPI_BR_NTKConditional branch instructions not taken
PAPI_BR_PRCConditional branch instructions correctly predicted
PAPI_BR_TKNConditional branch instructions taken
PAPI_BR_UCNUnconditional branch instructions
PAPI_BRU_IDLCycles branch units are idle
PAPI_BTAC_MBranch target address cache misses
Cache Requests:
PAPI_CA_CLNRequests for exclusive access to clean cache line
PAPI_CA_INVRequests for cache line invalidation
PAPI_CA_ITVRequests for cache line intervention
PAPI_CA_SHRRequests for exclusive access to shared cache line
PAPI_CA_SNPRequests for a snoop
Conditional Store:
PAPI_CSR_FALFailed store conditional instructions
PAPI_CSR_SUCSuccessful store conditional instructions
PAPI_CSR_TOTTotal store conditional instructions
Floating Point Operations:
PAPI_FAD_INSFloating point add instructions
PAPI_FDV_INSFloating point divide instructions
PAPI_FMA_INSFMA instructions completed
PAPI_FML_INSFloating point multiply instructions
PAPI_FNV_INSFloating point inverse instructions
PAPI_FP_INSFloating point instructions
PAPI_FP_OPSFloating point operations
PAPI_FP_STALCycles the FP unit
PAPI_FPU_IDLCycles floating point units are idle
PAPI_FSQ_INSFloating point square root instructions
Instruction Counting:
PAPI_FUL_CCYCycles with maximum instructions completed
PAPI_FUL_ICYCycles with maximum instruction issue
PAPI_FXU_IDLCycles integer units are idle
PAPI_HW_INTHardware interrupts
PAPI_INT_INSInteger instructions
PAPI_TOT_CYCTotal cycles
PAPI_TOT_IISInstructions issued
PAPI_TOT_INSInstructions completed
PAPI_VEC_INSVector/SIMD instructions
Cache Access:
PAPI_L1_DCAL1 data cache accesses
PAPI_L1_DCHL1 data cache hits
PAPI_L1_DCMLevel 1 data cache misses
PAPI_L1_DCRL1 data cache reads
PAPI_L1_DCWL1 data cache writes
PAPI_L1_ICAL1 instruction cache accesses
PAPI_L1_ICHL1 instruction cache hits
PAPI_L1_ICMLevel 1 instruction cache misses
PAPI_L1_ICRL1 instruction cache reads
PAPI_L1_ICWL1 instruction cache writes
PAPI_L1_LDMLevel 1 load misses
PAPI_L1_STMLevel 1 store misses
PAPI_L1_TCAL1 total cache accesses
PAPI_L1_TCHL1 total cache hits
PAPI_L1_TCMLevel 1 cache misses
PAPI_L1_TCRL1 total cache reads
PAPI_L1_TCWL1 total cache writes
PAPI_L2_DCAL2 data cache accesses
PAPI_L2_DCHL2 data cache hits
PAPI_L2_DCMLevel 2 data cache misses
PAPI_L2_DCRL2 data cache reads
PAPI_L2_DCWL2 data cache writes
PAPI_L2_ICAL2 instruction cache accesses
PAPI_L2_ICHL2 instruction cache hits
PAPI_L2_ICMLevel 2 instruction cache misses
PAPI_L2_ICRL2 instruction cache reads
PAPI_L2_ICWL2 instruction cache writes
PAPI_L2_LDMLevel 2 load misses
PAPI_L2_STMLevel 2 store misses
PAPI_L2_TCAL2 total cache accesses
PAPI_L2_TCHL2 total cache hits
PAPI_L2_TCMLevel 2 cache misses
PAPI_L2_TCRL2 total cache reads
PAPI_L2_TCWL2 total cache writes
PAPI_L3_DCAL3 data cache accesses
PAPI_L3_DCHLevel 3 Data Cache Hits
PAPI_L3_DCMLevel 3 data cache misses
PAPI_L3_DCRL3 data cache reads
PAPI_L3_DCWL3 data cache writes
PAPI_L3_ICAL3 instruction cache accesses
PAPI_L3_ICHL3 instruction cache hits
PAPI_L3_ICMLevel 3 instruction cache misses
PAPI_L3_ICRL3 instruction cache reads
PAPI_L3_ICWL3 instruction cache writes
PAPI_L3_LDMLevel 3 load misses
PAPI_L3_STMLevel 3 store misses
PAPI_L3_TCAL3 total cache accesses
PAPI_L3_TCHL3 total cache hits
PAPI_L3_TCMLevel 3 cache misses
PAPI_L3_TCRL3 total cache reads
PAPI_L3_TCWL3 total cache writes
Data Access:
PAPI_LD_INSLoad instructions
PAPI_LST_INSLoad/store instructions completed
PAPI_LSU_IDLCycles load/store units are idle
PAPI_MEM_RCYCycles Stalled Waiting for memory Reads
PAPI_MEM_SCYCycles Stalled Waiting for memory accesses
PAPI_MEM_WCYCycles Stalled Waiting for memory writes
PAPI_PRF_DMData prefetch cache misses
PAPI_RES_STLCycles stalled on any resource
PAPI_SR_INSStore instructions
PAPI_STL_CCYCycles with no instructions completed
PAPI_STL_ICYCycles with no instruction issue
PAPI_SYC_INSSynchronization instructions completed
TLB Operations:
PAPI_TLB_DMData translation lookaside buffer misses
PAPI_TLB_IMInstruction translation lookaside buffer misses
PAPI_TLB_SDTranslation lookaside buffer shootdowns
PAPI_TLB_TLTotal translation lookaside buffer misses


Nils Smeds <>

The PAPI Team. See them at the PAPI Web Site:


The exact semantics of an event counter are platform dependent. PAPI preset names are mapped onto available events in a way so as to count as similar types of events as possible on different platforms. Due to hardware implementation differences it is not necessarily possible to directly compare the counts of a particular PAPI event obtained on different hardware platforms.


PAPI (3), PAPI_native (3), PAPI_enum_event (3), PAPI_get_event_info (3), PAPI_event_code_to_name (3), PAPI_event_name_to_code (3)

PAPI Programmer’s Reference PAPI_presets (3) November, 2003

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