NAME

PAPI_get_hardware_info - get information about the system hardware

CONTENTS

Synopsis
Description
Note
Arguments
Return Values
Errors
Example
Data Structure
Authors
Bugs
See Also

SYNOPSIS

C Interface

#include <papi.h> 

const PAPI_hw_info_t *PAPI_get_hardware_info(void); 

Fortran Interface

#include fpapi.h 

PAPIF_get_hardware_info(C_INT ncpu, C_INT nnodes,  
           C_INT  totalcpus,  C_INT  vendor, 
           C_STRING  vendor_string,   C_INT  model, 
           C_STRING  model_string,
           C_FLOAT  revision,  C_FLOAT  mhz)

DESCRIPTION

In C, this function returns a pointer to a structure containing information about the hardware on which the program runs. In Fortran, the values of the structure are returned explicitly.

NOTE

The C structure contains detailed information about cache and TLB sizes. This information is not available from Fortran.

ARGUMENTS

The following arguments are implicit in the structure returned by the C function, or explicitly returned by Fortran.

ncpu -- number of CPUs in an SMP Node

nnodes -- number of Nodes in the entire system

totalcpus -- total number of CPUs in the entire system

vendor -- vendor id number of CPU

vendor_string -- vendor id string of CPU

model -- model number of CPU

model_string -- model string of CPU

revision -- Revision number of CPU

mhz -- Cycle time of this CPU; *may* be an estimate generated at init time with a quick timing routine

RETURN VALUES

On success, the C function returns a non-NULL pointer, and the Fortran function returns PAPI_OK.
On error, NULL is returned by the C function, and a non-zero error code is returned by the Fortran function.

ERRORS

PAPI_EINVAL
  One or more of the arguments is invalid.

EXAMPLE


const PAPI_hw_info_t *hwinfo = NULL;
        
if (PAPI_library_init(PAPI_VER_CURRENT) != PAPI_VER_CURRENT)
  exit(1);

if ((hwinfo = PAPI_get_hardware_info()) == NULL) exit(1);

printf("%d CPU’s at %f Mhz.\n",hwinfo->totalcpus,hwinfo->mhz);

DATA STRUCTURE

The C data structure returned by this function is found in papi.h and reproduced below:


   typedef struct _papi_hw_info {
      int ncpu;                 /* Number of CPU’s in an SMP Node */
      int nnodes;               /* Number of Nodes in the entire system */
      int totalcpus;            /* Total number of CPU’s in the entire system */
      int vendor;               /* Vendor number of CPU */
      char vendor_string[PAPI_MAX_STR_LEN];     /* Vendor string of CPU */
      int model;                /* Model number of CPU */
      char model_string[PAPI_MAX_STR_LEN];      /* Model string of CPU */
      float revision;           /* Revision of CPU */
      float mhz;                /* Cycle time of this CPU, *may* be estimated at
                                   init time with a quick timing routine */

/* Memory Information */ int L1_tlb_size; /*Data + Instruction Size */ int L1_itlb_size; /*Instruction TLB size in KB */ short int L1_itlb_assoc; /*Instruction TLB associtivity */ int L1_dtlb_size; /*Data TLB size in KB */ short L1_dtlb_assoc; /*Data TLB associtivity */

int L2_tlb_size; /*Data + Instruction Size */ int L2_itlb_size; /*Instruction TLB size in KB */ short int L2_itlb_assoc; /*Instruction TLB associtivity */ int L2_dtlb_size; /*Data TLB size in KB */ short L2_dtlb_assoc; /*Data TLB associtivity */

int L1_size; /* I+D */ int L1_icache_size; /*Level 1 instruction cache size in KB */ short int L1_icache_assoc; /*Level 1 instruction cache associtivity */ int L1_icache_lines; /*Number of lines in Level 1 instruction cache */ int L1_icache_linesize; /*Line size in KB of Level 1 instruction cache */

int L1_dcache_size; /*Level 1 data cache size in KB */ short int L1_dcache_assoc; /*Level 1 data cache associtivity */ int L1_dcache_lines; /*Number of lines in Level 1 data cache */ int L1_dcache_linesize; /*Line size in KB of Level 1 data cache */

int L2_cache_size; /*Level 2 cache size in KB */ short int L2_cache_assoc; /*Level 2 cache associtivity */ int L2_cache_lines; /*Number of lines in Level 2 cache */ int L2_cache_linesize; /*Line size in KB of Level 2 cache */

int L3_cache_size; /*Level 3 cache size in KB */ short int L3_cache_assoc; /*Level 3 cache associtivity */ int L3_cache_lines; /*Number of lines in Level 3 cache */ int L3_cache_linesize; /*Line size of Level 3 cache */ } PAPI_hw_info_t;

AUTHORS

The PAPI Team. See them at the PAPI Web Site: http://icl.cs.utk.edu/projects/papi

BUGS

If called before PAPI_library_init() the behavior of the routine is undefined.

SEE ALSO

PAPI_library_init (3), PAPI_get_opt (3), PAPI_get_dmem_info (3), PAPI_get_executable_info (3)


PAPI Programmer’s Reference PAPI_get_hardware_info (3) November, 2003

  Innovative Computing Laboratory
2001 R&D Winner  
Contact PAPI: papi@cs.utk.edu Computer Science Department
  University of Tennessee