typedef struct _papi_hw_info {
int ncpu; /* Number of CPUs in an SMP Node */
int nnodes; /* Number of Nodes in the entire system */
int totalcpus; /* Total number of CPUs in the entire system */
int vendor; /* Vendor number of CPU */
char vendor_string[PAPI_MAX_STR_LEN]; /* Vendor string of CPU */
int model; /* Model number of CPU */
char model_string[PAPI_MAX_STR_LEN]; /* Model string of CPU */
float revision; /* Revision of CPU */
float mhz; /* Cycle time of this CPU, *may* be estimated at
init time with a quick timing routine */
/* Memory Information */
int L1_tlb_size; /*Data + Instruction Size */
int L1_itlb_size; /*Instruction TLB size in KB */
short int L1_itlb_assoc; /*Instruction TLB associtivity */
int L1_dtlb_size; /*Data TLB size in KB */
short L1_dtlb_assoc; /*Data TLB associtivity */
int L2_tlb_size; /*Data + Instruction Size */
int L2_itlb_size; /*Instruction TLB size in KB */
short int L2_itlb_assoc; /*Instruction TLB associtivity */
int L2_dtlb_size; /*Data TLB size in KB */
short L2_dtlb_assoc; /*Data TLB associtivity */
int L1_size; /* I+D */
int L1_icache_size; /*Level 1 instruction cache size in KB */
short int L1_icache_assoc; /*Level 1 instruction cache associtivity */
int L1_icache_lines; /*Number of lines in Level 1 instruction cache */
int L1_icache_linesize; /*Line size in KB of Level 1 instruction cache */
int L1_dcache_size; /*Level 1 data cache size in KB */
short int L1_dcache_assoc; /*Level 1 data cache associtivity */
int L1_dcache_lines; /*Number of lines in Level 1 data cache */
int L1_dcache_linesize; /*Line size in KB of Level 1 data cache */
int L2_cache_size; /*Level 2 cache size in KB */
short int L2_cache_assoc; /*Level 2 cache associtivity */
int L2_cache_lines; /*Number of lines in Level 2 cache */
int L2_cache_linesize; /*Line size in KB of Level 2 cache */
int L3_cache_size; /*Level 3 cache size in KB */
short int L3_cache_assoc; /*Level 3 cache associtivity */
int L3_cache_lines; /*Number of lines in Level 3 cache */
int L3_cache_linesize; /*Line size of Level 3 cache */
} PAPI_hw_info_t;